The FRC Oscillator is a fast (8 MHz nominal), user-trimmable, internal RC oscillator. The output can drive the System PLL, or be divided by 16 or divided using the programmable FRCDIV bits.
The FRCDIV bits configure a selectable output divider that allows the choice of a lower clock frequency from seven different options, plus the direct 8 MHz output. Available lower frequency options range from 4 MHz (divide-by-2) to 31 kHz (divide-by-256).
The FRC Oscillator Tuning register, OSCTUN, allows the user to fine tune the FRC Oscillator over a range of approximately ±12% (typical). Each bit increment or decrement changes the factory calibrated frequency of the FRC Oscillator by a fixed amount.
The following MPLAB® Harmony function examples configure the FRC divider and tune values at run-time.
// FRCDIV = FRC/1
PLIB_OSC_FRCDivisorSelect(OSC_ID_0, OSC_FRC_DIV_1);
// Tune = 0 (no deviation from nominal)
PLIB_OSC_FRCTuningSelect(OSC_ID_0, 0);

