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   Special Reports

Backside Power Delivery Creates Fab Tool, Thermal Dissipation Barriers

By: Laura Peters

Moving the power delivery network to the backside of a chip reduces congestion, but it introduces new challenges for fabs.
When Cleaning Chips Isn’t Clean Enough

By: Gregory Haley

Contamination is a systems-level limiter at advanced nodes, and there's no simple solution to fix it.
The Race Begins For Much Bigger Abstractions In Data Centers

By: Ed Sperling

Massive compute capabilities enable a whole new way of manipulating and using data, and a potential bonanza for AI data...

 more »

Top Stories

Auto Security Accelerates With Standardization And Certified Silicon

OEMs are driving faster design cycles and enhanced security amid evolving vehicle archi...

Limiting AI/ML Tools To Ensure Physical AI Safety, Security

Tools designed to verify and monitor physical AI systems offer value, but human oversig...

New Automotive Architectures Are Shaking Up Processor And Memory Choices

Exponential increases in data and a mix of performance requirements are driving a top-t...

Tool And Methodology Changes Coming In Fab And Package Automation

How new equipment and methodologies are improving reliability, yield, and time-to-marke...

Making Hybrid Bonding Better

Why this technology is so essential for multi-die assemblies, and how it can be improved.

Using Data And AI More Effectively In EDA

EDA produces a lot of data, but how useful is that for AI to consume? The industry look...

AI Starting To Simplify Design Of Programmable Logic

Engineering specialization is still required, but time to market will shrink for FPGAs ...

Verifying Scale-Up And Scale-Out In Data Centers

Navigating a sea of standards and options in a rack and between racks.

Back-End Automation Tackles Growing Complexity

As packaging complexity rises, the industry faces gaps in data, inspection, and process...

Laser Arrays May Simplify Co-Packaged Optics

Monolithic tunable lasers can adapt statically and dynamically.

Why Indium Oxide Chips Are Getting So Much Attention

Much work still needs to be done to make these materials reliable enough for commercial...

Can A Computer Science Student Be Taught To Design Hardware?

To fill the talent gap, CS majors could be taught to design hardware, and the EE curric...

Chiplets And 3D-ICs Add New Electrical And Mechanical Challenges

Reliability is now a system-level concern that includes everything from materials and p...

UCIe’s Major Technical Components Are Now In Place

Version 3.0 of the interconnect standard doubles bandwidth and supports new use cases a...

Minimum Energy Per Query

How much of the energy consumed in an AI chip is spent doing something useful? This que...

Catching Critical Defects In TSVs And Stacked Chips

Variation is a bigger problem in advanced packages with multiple chiplets; AI can help.

Resistance In Advanced Packages Is Now A System-Level Problem

Multi-die assemblies require the measurement of subtle changes at the precise point whe...

Chiplets Add More Inspection And Test Steps

What's required to improve the yield of multi-die assemblies.

Securing Hardware For The Quantum Era

Quantum computers may become a security threat as early as next year, and that threat w...

Consumer, Med Tech Mushrooms As Quantum Closes In

Bio-inspired medical devices can gather more data than ever before, and HPC/quantum wil...

more top stories »

Latest News

Chip Industry Week In Review

AI integrity attacks; bid for Rohm; US weighs more AI chip authority; on-chip security controls; new chips at MWC; optical interconnect deals; CPO funding; 18A; d...

Blog Review: Mar. 4

AI memory tradeoffs; formal certainty; 7nm university chip; thermal constraints; calibrating process models.

Chip Industry Week In Review

Rapidus' new $1.7B infusion; Intel and UMC leadership moves; faster EUV; $100B GPU deal; Arm-Tensor robocar; smartphone market to decline; HBF; $1B in AI chip fun...

more news »



Opinion

Data Centers In Space?

Someday, but not soon. Chip execs don’t need to start design...

Follow The AI Leader

Who will lead the integration of AI with EDA? That story has ...

more opinions »



Research

Research Bits: Mar. 9

Low noise clock generator; on-chip thermal sensor; carbon nano...

Chip Industry Technical Paper Roundup: Mar. 9

GPU for FHE; heterogeneous memory design; formal verification;...

Research Bits: Mar. 3

Computational electron microscopy; measuring multiple properti...

more research »



Startup Corner

Startup Funding: Q4 2025

More and bigger funding rounds for AI chips and AI for making ...

Startup Tips To Get From Seed Funding To Series A, B, C

Everyone has a bright idea about how to save power or boost pe...

more startups »

Videos

New Challenges In Signoff


New Performance Requirements For Audio


Wi-Fi 7 Moves To The IoT


Changes In Chip Architectures At The Edge


Knowledge Centers / Entities, people and technologies explored

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