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TLP Processing Hints

ECN Affected Document
PCIe Base Spec 2.0, Atomic Operations ECN
Date
09/11/2008
Technology
Group
Specification Type

This optional normative ECR defines a mechanism by which a Requester can provide hints on a per transaction basis to facilitate optimized processing of transactions that target Memory Space. The architected mechanisms may be used to enable association of system processing resources (e.g. caches) with the processing of Requests from specific Functions or enable optimized system specific (e.g. system interconnect and Memory) processing of Requests.

For Posted Requests and Non-Posted Requests that target Memory Space, a bit in the first DWORD of the TLP header is used to indicate the presence of TLP Processing Hints (TPH). Baseline TPH defines 10 bits for Processing Hints and Steering Tags. The Processing Hints use 2 reserved bits in the TLP header to indicate the communication usage model. The remaining 8 bits are used for a Steering Tag. For Memory Write Requests, the Tag field is repurposed to carry the Steering Tag. For Memory Read Requests and AtomicOp Requests, the first DW Byte Enables and last DW Byte Enables are repurposed to carry the Steering Tag.

For systems where more than 10 bits of TPH fields are required for scalability, an optional TPH TLP Prefix may be used. The TPH TLP Prefix extends the TPH fields by adding a DW Prefix in front of the TLP header. The first byte of the Prefix indicates that it is a TPH TLP Prefix, and the remaining 24 bits of the Prefix carry the Extended TPH fields.

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